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Design of buffer architecture for multi-media stream microprocessor
Wang Guang, Shen Xubang*
Xi'an Microelectronic Technology Institute, Xi'an 710054, China

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Abstract�� The characteristics of media processing applications are poorly matched to conventional microprocessor architectures. The growing processor-memory performance gap was solved. The communication bottlenecks of traditional microprocessor, which is used for media processing application, were discussed. It was concluded that the traditional Cache architecture does not adapt to the modern media processing application by analyzing the characteristics of Cache memory. Some current schemes used to solve the communication bottlenecks were discussed. A new architecture design of pyramid memory hierarchy was brought forward, which substituted the larger stream register files for Cache as the medial buffers and could adapt to media processing applications. This architecture provided a three-tiered parallel data bandwidth hierarchy, including memory bandwidth, global register bandwidth, and local register bandwidth, with a ratio of 1��16��256. With this bandwidth scaling, the bandwidth requirements of satellite remote sensing image pretreatment may be efficiently matched.
Keywords�� media processing application   memory bandwidth   memory hierarchy   stream register file   stream buffer     
Received 2005-02-04;


About author: �� ��(1973-), ��, ɽ����̨��, ��ʿ��, Jack.wang.guang@tom.com.
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Wang Guang, Shen Xubang.Design of buffer architecture for multi-media stream microprocessor[J]  JOURNAL OF BEIJING UNIVERSITY OF AERONAUTICS AND A, 2006,V32(01): 74-78
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