北京航空航天大学学报 ›› 2004, Vol. 30 ›› Issue (11): 1129-1132.

• 论文 • 上一篇    下一篇

基于HPI的神经网络图像匹配多处理机系统

石争浩1, 冯亚宁1, 张遂南2, 黄士坦2   

  1. 1. 西安理工大学 计算机科学与工程学院 西安 710048;
    2. 西安微电子技术研究所, 西安 710054
  • 收稿日期:2004-06-25 出版日期:2004-11-30 发布日期:2010-09-24
  • 作者简介:石争浩 (1968-),男,陕西富平人,博士生, fyn-szh@263.net.
  • 基金资助:

    航天"十五"预研基金资助项目(413160203); 西安理工大 学中青年创新基金资助项目(116-210302)

HPI based multi-processor system for neural network image matching

Shi Zhenghao1, Feng Yaning1, Zhang Suinan2, Huang Shitan2   

  1. 1. School of Computer Science, Xi'an University of Technology, Xi 'an 710048, China;
    2. Xi'an Institute of MicroElectronics, Xi'an 710054, China
  • Received:2004-06-25 Online:2004-11-30 Published:2010-09-24

摘要: 针对嵌入式图像匹配计算特点,采用TMS320C6X系列处理器作为并行神经处理单元,设计了 一种基于TMS320C6X系列处理器HPI(Host-Port-Interface)互连的神经网络图像匹配多处理机系统,在这种并行计算系统中,包括一个主控计算单元和三个并行神经计算单元,主控计算单元通过HPI接口与各个神经匹配处理单元直接连接,通过HPI接口,主控计算单元可以直接访问各个神经元的片上和片外存储器,实现实时图像数据的直接转发和神经元中间运算结果的读取.理论分析表明,该设计可有效优化神经计算结构,提高图像匹配的实时性.

Abstract: Aim at the characteristics of embedded image matching, TMS320C6X family processo rs were used for parallel neural computing units, and a multi-processo r system structure based on TMS320C6X HPI(host parasite interface) interlinkin g for neural network image matching was presented. In this parallel computing sy stem, one host computer and three DSP neural units are contained, the master com puter is directly linked with each neural computing unit by HPI, memory of each neural unit can be directly accessed by the master computer through their HPI, t he real time image datum and the inter-results datum of each neural unit can be immediately directed transmit to each other between neural unit and the master c omputer. As a result, the real time performance of image matching is effectively improved according to theoretical analysis.

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