北京航空航天大学学报 ›› 2015, Vol. 41 ›› Issue (1): 14-22.doi: 10.13700/j.bh.1001-5965.2014.0467

• 论文 • 上一篇    下一篇

基于FPGA的高效机载视频采集及预处理方法

姜宏旭, 李辉勇, 刘亭杉, 段洣毅, 张萍   

  1. 北京航空航天大学 计算机学院, 北京 100191
  • 收稿日期:2014-04-28 出版日期:2015-01-20 发布日期:2015-02-04
  • 通讯作者: 姜宏旭 (1976-),男,陕西蓝田人,副教授,jianghx@buaa.edu.cn,主要研究方向为视频图像处理与高速嵌入式系统设计. E-mail:jianghx@buaa.edu.cn
  • 基金资助:

    国家自然科学基金资助项目(61272347);国家杰出青年科学基金资助项目(61125206)

Method for airborne video capture and preprocessing based on FPGA

JIANG Hongxu, LI Huiyong, LIU Tingshan, DUAN Miyi, ZHANG Ping   

  1. School of Computer Science and Engineering, Beijing University of Aeronautics and Astronautics, Beijing 100191, China
  • Received:2014-04-28 Online:2015-01-20 Published:2015-02-04

摘要:

为提高机载视频编码系统的数据采集及预处理性能,以现场可编程门阵列(FPGA)为硬件平台,研究了多模式机载视频采集、颜色空间转换和视频数据传输的高效处理方法.针对机载应用需要实时采集不同模式视频的特点,设计了一种可靠的视频采集策略,通过引入错误自检机制,可以实时监测视频采集的正确性,避免视频数据的错误积累;针对机载视频颜色空间转换预处理中浮点乘法浪费计算资源和增加系统功耗的问题,设计了一种基于高低位分离的截断式查找表乘法器,减少了存储空间和计算位宽,结合流水线处理技术实现了一种高效视频颜色空间转换方法,在保证计算精度和性能的同时,处理功耗最大降低了27%;针对FPGA处理器与系统核心编码处理器(DSP)之间存在大量视频数据的频繁传输特点,结合SRIO(Serial Rapid I/O)链路的传输方式,设计了一种以FPGA为控制核心的数据交互机制,减轻了DSP的处理负担使其专注于视频编码运算,提高系统性能.

关键词: 视频采集, 预处理, 低功耗, 数据传输, 视频编码

Abstract:

Video capture, color space conversion and video data transmission were researched in order to improve video capture and pre-processing performance of airborne multi-mode video coding system. Taking into account the requirements of real-time multi-mode video capture, a robust video capture strategy based on field-programmable gate array (FPGA) was designed. It monitors the correctness of video capture on-time to avoid accumulation of errors by adopting self-checking mechanism. To solve the problem of wastes of computing resources and increasement of power consumption in floating-point multiplication, a truncated look-up table multiplier based on the separation of high and low bits was designed to save memory and computation bandwidth. It achieves an efficient color space conversion combining pipeline technique, with power consumption decreasing 27% at most without loss of computing precision and processing performance. Considering the frequent transmission of mass data between FPGA and digital signal processor (DSP), a data interaction mechanism taking FPGA as the control core was proposed, adopting the transmission mode of serial rapid I/O (SRIO). The burden of DSP was alleviated due to concentrating on video coding, and thus the application performance was improved.

Key words: video capture, preprocessing, low power, data transmission, video coding

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