Buck-Boost转换器总剂量辐射效应分析与抗辐射加固设计方法

郭仲杰; 卢沪; 刘楠; 吴龙胜

doi:10.13700/j.bh.1001-5965.2023.0050

Buck-Boost转换器总剂量辐射效应分析与抗辐射加固设计方法

doi: 10.13700/j.bh.1001-5965.2023.0050

郭仲杰^1, ,,
卢沪¹,
刘楠¹,
吴龙胜²

1.
西安理工大学自动化与信息工程学院，西安 710048
2.
西安电子科技大学微电子学院，西安 710071

基金项目: 国家自然科学基金(62171367)；陕西省重点研发计划(2021GY-060)；陕西省创新能力支撑计划(2022TD-39)；西安理工大学校企协同基金(252062109)

详细信息

通讯作者:
E-mail：zjguo@xaut.edu.cn

中图分类号: TN492
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出版历程
- 收稿日期: 2023-02-14
- 录用日期: 2023-04-12
- 网络出版日期: 2023-04-21
- 整期出版日期: 2025-02-28

Total ionizing dose effect analysis and radiation hardening design method of Buck-Boost converter

1.
School of Automation and Information Engineering，Xi’an University of Technology，Xi’an 710048，China
2.
School of Microelectronics，Xidian University，Xi’an 710071，China

Funds: National Natural Science Foundation of China (62171367); Key Research and Development Program of Shaanxi (2021GY-060)；Innovation Capability Support Program of Shaanxi (2022TD-39); School-Enterprise Cooperative Fund of Xi’an University of Technology (252062109)

More Information

Corresponding author: E-mail：zjguo@xaut.edu.cn

摘要

摘要:
DC-DC转换器在总剂量辐射环境下会带来输出电压漂移、线性调整率与负载调整率下降等影响，使得电路的输出稳定性能变差。针对传统基于工艺与版图的抗总剂量辐射效应加固方法会带来成本较高、版图面积过大及普适性较差等问题，提出一种实时监测与自适应加固并行的抗总剂量辐射效应加固设计方法，可脱离工艺实现在电路级层面的总剂量辐射效应加固，提升了Buck-Boost转换器的抗总剂量辐射能力。基于0.18 μm BCD工艺对所提方法进行具体电路设计与物理实现验证，结果表明：在剂量值为2000 Gy (Si)的条件下，可将系统增益的下降率从19.26%补偿至6.65%，输出电压漂移率从0.0663%改善至0.0074%，负载调整率和线性调整率分别降低2.15%/A和0.0389%/V，为电路与系统级的抗总剂量辐射效应加固设计提供了一种新方法。
- 总剂量辐射效应 /
- 加固设计 /
- Buck-Boost转换器 /
- 误差放大器 /
- 实时监测
Abstract:
DC-DC converter in the total dose radiation environment will mainly bring the output voltage drift, linear adjustment rate load adjustment rate decline and other effects so that the output stability performance of the circuit deteriorates. In order to address the issues with the conventional total ionizing dose effect hardening method that stem from process and layout, including high cost, large layout area, and poor universality, this paper suggests a total ionizing dose effect hardening design method with parallel monitoring and hardening. This method can accomplish total ionizing dose effect hardening at the circuit level without the need for a process. The anti-total dose capability of the Buck-Boost converter is improved. The circuit design and physical implementation of the proposed method are verified based on the 0.18 μm BCD process. According to the findings, with a dosage of 2000 Gy (Si), it is possible to enhance the output voltage shift rate from 0.0663% to 0.0074% and compensate the system gain drop rate from 19.26% to 6.65%. The load adjustment rate and linear adjustment rate are reduced by 2.15%/A and 0.0389%/V, respectively, which provides a new idea for the design of total ionizing dose effect hardening at the circuit and system level.
- total ionizing dose effect /
- hardening design /
- Buck-Boost converter /
- error amplifier /
- real-time monitoring

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图 1 总剂量辐射效应模拟方法

Figure 1. Total ionizing dose effect simulation method

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图 2 Buck-Boost系统环路结构

Figure 2. Loop structure of Buck-Boost system

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图 3 抗总剂量辐射效应加固电路

Figure 3. Total ionizing dose effect hardening circuit

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图 4 误差放大器加固设计电路

Figure 4. Error amplifier hardening design circuit

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图 5 整体版图照片

Figure 5. Overall layout photograph

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图 6 Buck-Boost转换器仿真输出波形

Figure 6. Simulation output waveform of Buck-Boost converter

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图 7 误差放大器增益、相位仿真输出波形

Figure 7. Gain-phase simulation output waveform of error amplifier

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图 8 误差放大器增益随电阻的变化

Figure 8. Variation of error amplifier gain with resistance

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图 9 误差放大器增益随补偿电流的变化

Figure 9. Variation of error amplifier gain with compensation current

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图 10 PVT下仿真结果

Figure 10. Simulation results under PVT

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图 11 Buck-Boost转换器验证方案

Figure 11. Buck-Boost converter verification scheme

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表 1 加固前后Buck-Boost转换器相关参数对比

Table 1. Comparison of Buck-Boost converter related parameters before and after hardening

状态	输出电压/V	环路增益/dB	负载调整率/(%·A⁻¹)	线性调整率/(%·V⁻¹)	监测电压/V	负载电流/mA
正常	−2.70075	86.82	1	0.0046	1.2	600.2
加固前	−2.70254	70.1	3.27	0.044		600.566
加固后	−2.70055	81.05	1.12	0.0051	1.1894	600.122

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表 2 不同方法对比结果

Table 2. Comparison results of different methods

方法	工艺	版图面积/（mm×mm）	温度/℃	输出电压漂移率/%	剂量值/（Gy（Si））
本文	0.18 μm BCD	1.107×0.715	−40～85	0.0074	2000
文献[4]	0.6 μm BiCMOS	3.91×1.37	−55～125	0.20	1500
文献[14]	0.35 μm BCD	2.39×3.09	−55～125	0.13	3000
文献[15]	0.35 μm CMOS	6×6			430
文献[16]	0.35 μm BCD	3.34×2.3	−55～125	0.60	1000

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参考文献(16)

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