Debugger Design of Fault Tolerant Computer
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摘要: 探讨了容错计算系统的调试方法和工具结构,提出采用RTscope多任务调试工具在目标机操作系统层上完成调试的途径.说明了容错计算机开发和测试对环境的要求,给出了调试器的体系结构和完成实时通信功能的驱动程序,建立了Windows实时多任务交叉调试环境.结果表明大大地降低了系数的复杂性,使之易于开发和测试周期.Abstract: The debugging method and tools of fault tolerant computing systems are explored. The presented approach is based on use of RT scope multitask debugging tools at the operating system level on a prototype of the system considered. The paper first discusses requirement on environment during developing fault tolerant computer. The system architecture of debugger for fault tolerant computer is presented. The driver is designed to perform real time communicationn function.The cross debugging environment of real-time multitasks is set up under Windows. The results show that it greatly decreases the complexity of computer system and brings much usefulness into developing and testing.
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Key words:
- fault-tolerant computers /
- adjustment methods /
- real-time control /
- embedded computer
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1. NASAThe Charles Stark Draper Laboratory Inc.Development and evaluation of a fault tolerant multi processor(FTMP) computer NASA-CR-166073.Massachusetts:NASA,1983 2. 刘衍鹏.实时多任务容错软件调试环境:[学位论文].北京:北京航空航天大学计算机科学与工程系,1996
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