| Citation: | ZHAO W K，WANG L Y，CEN X M，et al. Area optimization of multilevel logic circuits using approximate computing[J]. Journal of Beijing University of Aeronautics and Astronautics，2024，50（9）：2893-2901 （in Chinese） doi: 10.13700/j.bh.1001-5965.2022.0742
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According to the reported multi-level logic approximation optimization algorithm which can not balance the optimization effect and working speed well for largecircuits. It is proposed to use constant substitution in conjunction with and-inverter-graph (AIG) to optimize the logic at multiple levels for circuit areas. A set of candidate nodes to be replaced and a constant value for the node to be replaced are determined by employing the proposed error rate control technique of constant substitution of multiple fan-out nodes and a number of parameters known as node output distance, constant transmission distance, and so forth. Furthermore, according to the circuit size, different error rate calculation methods are selected to improve the speed of the algorithm. The proposed algorithm is programmed in C and implemented with the ABC tool and tested with EPFL and MCNC bench-marks. The experimental results show, compared with the report's similar methods, the proposed algorithm can save 48.77% area. When compared to approximate logic synthesis by resubstitution with approximate care (ALSRAC), this method achieves a 1.28% increase in area optimization and a 60.91% reduction in running time.
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