Volume 34 Issue 12
Dec.  2008
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Song Dan, Zhang Xiaolin, Xia Wenboet al. Design of low voltage CMOS folded-cascode mixer[J]. Journal of Beijing University of Aeronautics and Astronautics, 2008, 34(12): 1452-1455. (in Chinese)
Citation: Song Dan, Zhang Xiaolin, Xia Wenboet al. Design of low voltage CMOS folded-cascode mixer[J]. Journal of Beijing University of Aeronautics and Astronautics, 2008, 34(12): 1452-1455. (in Chinese)

Design of low voltage CMOS folded-cascode mixer

  • Received Date: 27 Dec 2007
  • Publish Date: 31 Dec 2008
  • By using the folded-cascode structure, the problem on high supply voltage of the stacking trans-conductance stage and switching-transistor stage was solved, and the trade-off among the high trans-conductance, high linearity of the trans-conductance stage and the low noise of the switching-transistor stage were also realized. Implemented in a SMIC 0.18μm CMOS process, the low-voltage complementary metal-oxide semiconductor (CMOS) folded-cascode mixer (FCM) core has an area of 165μm×75μm. When the frequency of the radio frequency (RF) signal, local oscillator (LO) signal and the intermediate frequency (IF) signal are 1575.42MHz, 1570MHz and 5.42MHz, respectively, the simulation results show that the mixer features a conversion gain ( GC ) of 15dB, a dual sideband (DSB) noise figure of 12.5dB, a third-order input intercept point (IIP3) of -0.4dBm, and consumes 3.8mW at a power supply voltage of 1.2V. The mixer can be applied to the electronic systems within the realm of the aviation aerospace.

     

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