An infrared small target detection network under various complex backgrounds realized on FPGA

The infrared (IR) small target detection algorithm with high detection rate, low false alarm rate and good real-time performance has important application value in the field of IR remote sensing. Traditional IR small targets detection algorithms cannot guarantee the detection performance due to the low contrast and low signal-to-noise ratio (SNR) of small targets under various complex backgrounds. Based on robust infrared small target detection network (RISTDnet) proposed, for more diverse target structure characteristics and higher real-time processing performance requirements, an enhanced infrared small target detection network (EISTDnet) and its field programmable logic gate array (FPGA) based high-performance parallel processing method are proposed. In EISTDnet, a multi-scale small target feature extraction framework that combines manual feature methods and convolutional neural networks is constructed, the size of the convolution kernel is normalized by the idea of multi-level expansion, and real-time processing performance in the inference stage is effectively improved through deep data reuse and multi-dimensional loop parallel unfolding. Experimental results show that the EISTDnet realized on a single FPGA can quickly detect small targets with different sizes and low SNR in various complex backgrounds in real time. Compared with the existing 5 algorithms, the average detection rate is increased by 49.5% with a low false alarm rate of 10⁻³. Compared with RISTDnet, the real-time processing speed is increased by 1.33 times, and the detection rate of low SNR strip small targets is increased by 29.4%. EISTDnet has better effectiveness and robustness.