Designing Simulation of RF Low Noise Amplifier

A design approach of low noise amplifiers (LNA), which are employed in the receiving terminals of radio frequency integrated circuits (RFIC), based on HP's EESOF simulation software is studied. In this design example, a HP's GaAs FET (HP ATF21186) is applied. The required satisfactions are: entire gain of LNA should be larger than 33dB, noise figure should be less than 2.0, and input and output standing wave should be smaller than 2.0. Since the stability of ATF-21186 is not good enough and also the above design satisfactions must be required, the study is focused on an optimized design scheme to obtain a high stability, lower noise figure and better input/output matching. The design is done first in a equivalent lumped circuit model and then all lumped elements are implemented by planer circuit, which is required by integrated circuit. The simulation results of EESOF software show that the approach in this paper is accurate and efficient.