Volume 24 Issue 4
Apr.  1998
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Jin Huihua, Liu Yanpeng, Chen Yongpinget al. Debugger Design of Fault Tolerant Computer[J]. Journal of Beijing University of Aeronautics and Astronautics, 1998, 24(4): 445-448. (in Chinese)
Citation: Jin Huihua, Liu Yanpeng, Chen Yongpinget al. Debugger Design of Fault Tolerant Computer[J]. Journal of Beijing University of Aeronautics and Astronautics, 1998, 24(4): 445-448. (in Chinese)

Debugger Design of Fault Tolerant Computer

  • Received Date: 14 May 1998
  • Publish Date: 30 Apr 1998
  • The debugging method and tools of fault tolerant computing systems are explored. The presented approach is based on use of RT scope multitask debugging tools at the operating system level on a prototype of the system considered. The paper first discusses requirement on environment during developing fault tolerant computer. The system architecture of debugger for fault tolerant computer is presented. The driver is designed to perform real time communicationn function.The cross debugging environment of real-time multitasks is set up under Windows. The results show that it greatly decreases the complexity of computer system and brings much usefulness into developing and testing.

     

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  • 1. NASAThe Charles Stark Draper Laboratory Inc.Development and evaluation of a fault tolerant multi processor(FTMP) computer NASA-CR-166073.Massachusetts:NASA,1983 2. 刘衍鹏.实时多任务容错软件调试环境:[学位论文].北京:北京航空航天大学计算机科学与工程系,1996
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