Experiments of aluminum migration of power silicon transistor using planar process

[1] Xie Jingsong,He Jingjing,McCluskey Patrick.Aluminum migration on the die surfaces of a power transistor in high-intensity electric fields //Proceedings of the 40th International Symposium on Microelectronics.San Jose:IMAPS,2007 [2] Michael L,Korwin-Pawlowski,Guillot Jean Michel,et al.Planar P-N junction semiconductor structure with multilayer passivation:United States,5677562 .1997-10-14 [3] Michal Bairanzade.Application note AN1628/D understanding power transistors breakdown parameters .Denver,CO:Motorola Literature Distribution,1997 .http://www.eetasia.com/ART_8800068404_499501_AN_f01d6f08.HTM [4] Mimura A,Oohayashi M,Murakami S,et al.High-voltage planar structure using SiO2-SIPOS-SiO2 Film[J].IEEE Electron Device Letters,1985,6 (4):189-191 [5] 史良钰.SIPOS钝化功率晶体管双线击穿现象的研究 .哈尔滨:哈尔滨理工大学应用科学学院,2009 Shi Liangyu.Study of double-line breakdown phenomenon for power transistor with SIPOS passivation layer .Harbin:School of Applied Sciences,Harbin University of Science and Technology,2009(in Chinese) [6] 姚立真.可靠性物理 [M].北京:电子工业出版社,2004:330-337 Yao Lizhen.Reliability physics[M].Beijing:Publishing House of Electronics Industry,2004:330-337(in Chinese) [7] J-STD-020C Moisture/reflow sensitivity classification for non-hermetic solid state surface mount devices[S] [8] Chung S K.Analytic model for field-plate-edge breakdown of planar devices terminated with field plate and semiresistive layer //IEE Proceedings on Science,Measurement and Technology.Stevenage:IET,2004:21-24 [9] Stoc kmeier T,Lilja K.SIPOS-passivation for high voltage power devices with planar junction termination //Proceedings of the 3rd International Symposium on Power Semiconductor Devices and ICs.Baltimore:IEEE,1991:145-148