Memory optimized parallel LDPC decoder architecture design on GPU

[1] Gallager R G.Low-density-parity-check-codes[J].IRE Trans-Information Theory,1962,18:21-28 [2] Mansour M M,Shanbhag N R.Turbo decoder architectures for low-density parity-check codes[C]// Chi-kuo Mao .Global Telecommunications Conference.Taipei:Cornell University,2002:1383-1388 [3] Mansour M M,Shanbhag N R.A 640-Mb/s 2048-bit programmable LDPC decoder chip [J].IEEE Journal on Solid-State Circuits,2006,41(3):684-698 [4] Zhang T,Parhi K.Joint (3,k)-regular LDPC code and decoder/encoder design[J].IEEE Trans Signal Processing,2004,52(4):1065-1079 [5] Dielissen J,Hekstra A.Low cost LDPC decoder for DVB-S2 [C]// Cyprian Grassmann.Proc Conf Design,Automation and Test in Europe (DATE '06).Munich,Germany:Designers' Forum,2006:130-136 [6] Daesun Oh,Keshab K Parhi.Low-complexity switch network for reconfigurable LDPC decoders [J].IEEE Transactions on Very Large Scale Integration Systems,2010,18(1):85-94 [7] Blake G,Dreslinski R G,Mudge T.A survey of multicore processors [J].IEEE Signal Processing Magazine,2009,26(6):26-37 [8] Sanders J,Kandrot E.CUDA by example [M].New Jersey,USA:Addison-Wesley,2010:4-6 [9] Goodnight N,Wang R,Humphreys G.Computation on programmable graphics hardware [J].IEEE Computer Graphics and Applications,2005,25(5):12-15 [10] Falc o G,Yamagiwa S,Silva V L.Parallel LDPC decoding on GPUs using a stream-based computing approach [J].Journal of Computer Science and Technology,2006,24:913-924 [11] Chang Chengchun,Chang Yanglang,Huang Minyu,et al.Accelerating regular LDPC code decoders on GPUs [J].IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing September,2011,4(3):653-659 [12] Gabriel Falc o,Leonel Sousa,Vitor Silva.Massively LDPC decoding on multicore architectures [J].IEEE Transactions on Parallel and Distributed Systems,2011,22(2):309-322 [13] Wang Guohui,Wu Michael,Sun Yang.A massively parallel implementation of QC-LDPC decoder on GPU [C]// Walid Najjar.2011 IEEE 9th Symposium on Application Specific Processors.San Diego,CA,USA:IEEE Computer Society,2011:82-85 [14] Ji Hyunwoo,Cho Junho,Sung Wonyong.Memory access optimized implementation of cyclic and quasi-cyclic LDPC codes on a GPGPU [J].Journal of Signal Processing Systems,2010,64(1):149-159 [15] CCSDS 131.1-O-2 Low density parity check codes for use in near-earth and deep space applications [S]