Volume 34 Issue 7
Jul.  2008
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Song Dan, Zhang Xiaolin, Xia Wenboet al. Low voltage NMOS bulk-biased folded-cascode Gilbert mixer[J]. Journal of Beijing University of Aeronautics and Astronautics, 2008, 34(7): 844-848. (in Chinese)
Citation: Song Dan, Zhang Xiaolin, Xia Wenboet al. Low voltage NMOS bulk-biased folded-cascode Gilbert mixer[J]. Journal of Beijing University of Aeronautics and Astronautics, 2008, 34(7): 844-848. (in Chinese)

Low voltage NMOS bulk-biased folded-cascode Gilbert mixer

  • Received Date: 20 Jun 2007
  • Publish Date: 31 Jul 2008
  • By using the bulk-biased technology and folded-cascode approach, the problem of stacking input-and switching-transistors within 0.8V supply voltage was solved. A low voltage N channel metal-oxide-semiconductor (NMOS)bulk-biased folded-cascode Gilbert mixer (BBFCM) was implemented in a SMIC 0.18μm CMOS process. The mixer was used in some double-system receiver, which includes the global position system(GPS) system. In order to test the performance of the mixer, take the GPS signal for example:the frequency of the radio frequency (RF) signal, local oscillator (LO) and the intermediate frequency (IF) signal are 1575.42MHz,1570MHz and 5.42MHz, respectively. Measurement results show that the mixer features a conversion gain (Gc) of higher than 15.66dB, a dual sideband (DSB) noise figure of 16.5dB, an input 1dB compression point (P-1dB) of approximate -10dBm, and consumes approximate 1.07mW at a power supply voltage of 0.8V.Although the mixer consumes very low power, it still provides reasonable gain as well as linearity. The mixer can be applied to the electronics system within the realm of the aviation aerospace.

     

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  • [1] Arvind Kumar, Sandip Tiwari. A power-performance adaptive low voltage analog circuit design using independently controlled double gate CMOS technology Proceedings of the 2004 International Symposium on Circuits and Systems. Vancouver:the Institute of Electrical and Electronics Engineers, Inc, 2004:197-200 [2] Blalock Benjamin J, Phillip E Allen. Designing 1-V Op amps using standard digital CMOS technology[J].IEEE Transactions on Circuits and System, II:Analog and Digital Signal Processing, 1998, 45(7):769-799 [3] Razavi B. Design of analog CMOS integrated circuits [M]. Singapore:McGraw-Hill,2001 [4] Chu Fangqing, Li Wei, Su Yanfeng, et al. An implementation of a CMOS down-conversion mixer for GSM1900 receivers [J]. Chinese Journal of Semiconductors, 2006, 27(3):467-472 [5] Melly T, Porret A S, Enz C C, et al. An analysis of flicker noise rejection in low-power and low-voltage CMOS mixers[J]. IEEE Journal of Solid-State Circuits, 2001, 36 (1) :102 [6] 崔福良,黄林,马德群,等. 2.4GHz 0.35um CMOS Gilbert下变频器[J]. 半导体学报, 2005, 26(5):1045-1048 Cui Fuliang, Huang Lin, Ma Dequn, et al. 2.4GHz 0.35um CMOS Gilbert down-conversion mixer [J]. Chinese Journal of Semiconductors,2005, 26(5):1045-1048(in Chinese) [7] 尹韬,朱樟明,杨银堂,等.衬底驱动MOSFET 特性分析及超低压运算放大器设计 [J].半导体学报,2005,26(1) :158-162 Yin Tao, Zhu Zhangming, Yang Yintang, et al. Analysis of bulk-driven MOSFET and design of ultra-low voltage operational amplifier [J]. Chinese Journal of Semiconductors,2005,26(1):158-162(in Chinese) [8] 张海军,杨银堂,朱樟明,等.一种基于衬底偏置的超低压CMOS 运算放大器 [J].电路与系统学报,2006,11(1) :12-15 Zhang Haijun, Yang Yintang, Zhu Zhangming, et al. A novel ultra-low voltage CMOS op-amp based on bulk-biased MOSFET [J]. Journal of Circuits and Systems,2006,11(1) :12-15(in Chinese) [9] Ivanov V, Zhou J, Filanovsky I M. A 100dB CMRR CMOS operational amplifier with single-supply capability [J]. IEEE Transactions on Circuits and System, II:Analog and Digital Signal Processing, 2007, 54(5):397-401 [10] Marin M, Deen M J, de Murcia M, et al. Effects of body biasing on the low frequency noise of MOSFETs from a 130 nm CMOS technology circuits IEE Proceedings Circuits,Devices & Systems.Stevenage:IET Michael Faraday House,2004, 151:95-101 [11] Blalock Benjamin J, Allen Phillip E. Low-voltage, bulk-driven MOSFET current mirror for CMOS technology IEEE International Symposium on Circuits and Systems.Seattle:the Institute of Electrical and Electronics Engineers, Inc, 1995, 3:1972-1975 [12] Long Di, Hon Xianlong, Dong Sheqin. Optimal two-dimension common centroid layout generation for MOS transistors unit-circuit IEEE International Symposium on Circuits and Systems. Kobe:the Institute of Electrical and Electronics Engineers, Inc,2005, 3:2999-3002
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