Advanced Search
Volume 33 Issue 12
Dec.  2007
Turn off MathJax
Article Contents
Journal of Beijing University of Aeronautics and Astronautics  > 2007  >  33(12): 1440-1443.
Li Wei, Sun Jinping, Wang Jun, et al. Implementation of 32k points ultra high speed FFT processor based on FPGA devices[J]. Journal of Beijing University of Aeronautics and Astronautics, 2007, 33(12): 1440-1443. (in Chinese)
Citation: Li Wei, Sun Jinping, Wang Jun, et al. Implementation of 32k points ultra high speed FFT processor based on FPGA devices[J]. Journal of Beijing University of Aeronautics and Astronautics, 2007, 33(12): 1440-1443. (in Chinese)
shu

Implementation of 32k points ultra high speed FFT processor based on FPGA devices

  • School of Electronics and Information Engineering, Beijing University of Aeronautics and Astronautics, Beijing 100083, China

  • Received Date: 15 Dec 2006
  • Publish Date: 31 Dec 2007
    Abstract
  • An ultra high speed 32k point pipelined fast Fourier transform (FFT) processor was designed with FPGA (field programmable gate arrays) implementation. The processor can operate at 125 MHz and is able to handle a continuous input complex data stream of 1 Giga-samples per second. The FFT processor is based on MDF(multi-path delay feedback) structure which combines the features of the SDF(single-path delay feedback) and MDC(multi-path delay commutator) architectures. The memory cost of the processor was decreased compared with the MDC architectures while the speed is higher than the SDF architectures. The algorithm and design model for the processor was established and the three modules of the processor according to the design model were optimized to decrease resource cost. The design was implemented with the the Xilinx ISE development tool using VHDL and was verified with the FPGA place and router results.

     

    • FullText(HTML)
  • loading
    • References(1)
  • [1] Benz1 A O, Grigis1 P C. A broadband FFT spectrometer for radio and millimeter astronomy[J]. Astronomy & Astrophysics, 2005,442(2): 767-773 [2] Zhong K, He H, Zhu G. An ultra high-speed FFT processor International Symposium on Signals, Circuits and Systems. Bangkok: , 2003: 37 - 40 [3] 谭征,张晓林.一种基于FPGA的超高速FFT处理器设计[J].遥测遥控,2005, 26(6): 46-49 Tan Zheng, Zhang Xiaolin. Design ultra high speed FFT processor based on FPGA[J]. Telemetry & Telecontrol, 2005, 26(6): 46-49 (in Chinese) [4] Oppenheim A V, Schafer R W. Discrete-time signal processing[M]. Englewood Cliffs,NJ:Prentice Hall, 1998 [5] 王旭东,刘渝.全并行结构FFT 的FPGA实现[J]. 南京航空航天大学学报, 2006, 38(2): 96-100 Wang Xudong, Liu Yu. Full parallel FFT based on FPGA[J]. Journal of Nanjing University of Aeronautics & Astronautics, 2006, 38(2): 96-100(in Chinese) [6] He S, Torkelson M. Designing pipeline FFT processor for OFDM (de)modulation International Symposium on Signals, Systems, and Electronics. New York: ,1998: 257-262 [7] Lin Y W, Liu H Y. A 1-Gs/s FFT/IFFT processor for UWB applications[J]. IEEE Journal of Solid-state Circuits, 2005, 40(8):1726-1735
    • Relative Articles
    • Supplements(0)
    • Cited By
  • 加载中

Catalog

    通讯作者: 陈斌, bchen63@163.com
    • 1. 

      沈阳化工大学材料科学与工程学院 沈阳 110142

    1. 本站搜索
    2. 百度学术搜索
    3. 万方数据库搜索
    4. CNKI搜索
    Get Citation
    PDF
    XML

    Article Metrics

    Article views(2982) PDF downloads(1918) Cited by()
    Proportional views
    Related

    Copyright © Journal of Beijing University of Aeronautics and Astronautics

    Address: Editorial Department of Journal of Beijing University of Aeronautics and Astronautics, 37 Xueyuan Road, Haidian District, Beijing Post Code: 100191 Email: jbuaa@buaa.edu.cn

    Supported by: Beijing Renhe Information Technology Co., Ltd.    

    /

    DownLoad:  Full-Size Img  PowerPoint
    Return
    Return