Volume 49 Issue 12
Dec.  2023
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LIU M,AN J S. Research and design of SpaceWire multi-priority hierarchical scheduling crossbar[J]. Journal of Beijing University of Aeronautics and Astronautics,2023,49(12):3386-3396 (in Chinese) doi: 10.13700/j.bh.1001-5965.2022.0101
Citation: LIU M,AN J S. Research and design of SpaceWire multi-priority hierarchical scheduling crossbar[J]. Journal of Beijing University of Aeronautics and Astronautics,2023,49(12):3386-3396 (in Chinese) doi: 10.13700/j.bh.1001-5965.2022.0101

Research and design of SpaceWire multi-priority hierarchical scheduling crossbar

doi: 10.13700/j.bh.1001-5965.2022.0101
Funds:  Supported by the Strategic Priority Research Program of the Chinese Academy of Sciences (XDA15020205)
More Information
  • Corresponding author: E-mail:anjunshe@nssc.ac.cn
  • Received Date: 01 Mar 2022
  • Accepted Date: 19 Apr 2022
  • Publish Date: 05 May 2022
  • SpaceWire (SpW) router is one of the key devices in the SpW network. It adopts a crossbar switching structure. Since the maximum length of the data packet of the SpW network is not fixed, the classic interative round robin matching with slip (iSlip) algorithm is not applicable. This paper studies the two-dimensional ripple-carry switching structure and proposes a multi-priority hierarchical scheduling crossbar switch implementation structure. The network quality of service (QoS) can be enhanced by giving various traffic types varying priorities, and group routing output fairness can be achieved by employing an arbitration feedback-based polling algorithm (FBP). By inserting registers into the circular ripple-carry switching(CRCS) structure, the combinational logic is split and a pipelined structure is formed, lessening the combinational delay. Also, Inserting registers increases the maximum frequency of the system and makes it possible to expand the number of router ports. A crossbar with a configurable priority number and port number is implemented using programmable logic language. The CRCS structure has the advantages of resource-saving, fast arbitration, and high scalability. By using the two-dimensional CRCS structure instead of the linear expansion structure, a 4×4 crossbar switch as an example, the number of arbitration logic cells is decreased by 67.3%, and the arbitration delay is decreased by about 60%. When it is synthesized on the Xilinx V7 series field programable gate array (FPGA). A maximum of two register insertion layers each for rows and columns is sufficient for the SpW routers at the largest scale.

     

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