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�������պ����ѧѧ�� 2003, Vol. 29 Issue (1) :5-8    DOI:
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Realization of a Programmable Radar Echo Simulator Based on PCI Bus
Huang Zhigang, Liu Zhongkan, Wan Guolong, Shan Dongmei*
Dept. of Electronic Engineering, Beijing University of Aeronautics and Astronautics

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ժҪ ���Ŀǰ�״�ز��ź�ģ�������ܵ�һ���źŻط��ٶȵ͵�����,����˲��ü����PCI����ʽ�ṹ������FIFO�͸���D/A��ʵ�ַ���,ʹģ���������ݸ����ٶȴﵽ8?MHz,�źŻط����ʴﵽ73?MHz;����FPGA����,ʹϵͳ�����̿ؿ�ѡ,�ҿɷ���ظĶ�����ɽṹ����Ӧ��ͬ���͵��״�.ͨ���Ժϳɿ׾��״�(SAR,Synthetic Aperture Radar)�ز��źŵķ������,�����ֳ����б���,�÷�������,�������пɿ�,����Ը߷ֱ���ͼ��ķ���Ҫ��.
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Abstract�� To improve the performance of current radar echo signal simulators, a scheme was advanced with computer PCI bus-organization, high speed FIFO and D/A. With the realization of this scheme, the simulator exhibits a data updating speed as high as 8?MHz and a signal conversion speed as high as 73?MHz. The use of FPGA technology made the system parameters programmable and able to change its structure expediently to adapt different types of radar. Through signal simulation output of synthetic aperture radar, the scheme was proved to be feasible. The operation of a sample machine was shown to be reliable and able to meet the needs of high-resolution image simulation.
Keywords�� radar echo simulators   bus-organization   synthetic aperture radar   FPGA technology     
Received 2001-06-19;
Fund:

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About author: ���Ǹ�(1962-),��,�ӱ���̨��,��ʿ��,100083,����.
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���Ǹ�, ���ؿ�, �����, ����÷.һ�ֻ���PCI���ߵĿɱ���״��ź�ģ����ʵ��[J]  �������պ����ѧѧ��, 2003,V29(1): 5-8
Huang Zhigang, Liu Zhongkan, Wan Guolong, Shan Dongmei.Realization of a Programmable Radar Echo Simulator Based on PCI Bus[J]  JOURNAL OF BEIJING UNIVERSITY OF AERONAUTICS AND A, 2003,V29(1): 5-8
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