留言板

尊敬的读者、作者、审稿人, 关于本刊的投稿、审稿、编辑和出版的任何问题, 您可以本页添加留言。我们将尽快给您答复。谢谢您的支持!

姓名
邮箱
手机号码
标题
留言内容
验证码

基于片上实时监测与自适应补偿的抗总剂量带隙基准

郭仲杰 任瑗 王亚朋 邱子忆 李梦丽

郭仲杰,任瑗,王亚朋,等. 基于片上实时监测与自适应补偿的抗总剂量带隙基准[J]. 北京航空航天大学学报,2025,51(12):4072-4079 doi: 10.13700/j.bh.1001-5965.2023.0697
引用本文: 郭仲杰,任瑗,王亚朋,等. 基于片上实时监测与自适应补偿的抗总剂量带隙基准[J]. 北京航空航天大学学报,2025,51(12):4072-4079 doi: 10.13700/j.bh.1001-5965.2023.0697
GUO Z J,REN Y,WANG Y P,et al. Based on on-chip real-time monitoring with adaptive compensation for anti-total dose bandgap reference[J]. Journal of Beijing University of Aeronautics and Astronautics,2025,51(12):4072-4079 (in Chinese) doi: 10.13700/j.bh.1001-5965.2023.0697
Citation: GUO Z J,REN Y,WANG Y P,et al. Based on on-chip real-time monitoring with adaptive compensation for anti-total dose bandgap reference[J]. Journal of Beijing University of Aeronautics and Astronautics,2025,51(12):4072-4079 (in Chinese) doi: 10.13700/j.bh.1001-5965.2023.0697

基于片上实时监测与自适应补偿的抗总剂量带隙基准

doi: 10.13700/j.bh.1001-5965.2023.0697
基金项目: 

国家自然科学基金(62171367); 陕西省重点研发计划项目(2021GY-060);陕西省创新能力支撑计划项目(2022TD-39);西安理工大学校企协同基金(252062213)

详细信息
    通讯作者:

    E-mail:zjguo@xaut.edu.cn

  • 中图分类号: TN492

Based on on-chip real-time monitoring with adaptive compensation for anti-total dose bandgap reference

Funds: 

National Natural Science Foundation of China (62171367); Key Research and Development Plan of Shaanxi Province (2021GY-060); Shaanxi Innovation Capability Support Programme Project(2022TD-39); Xi’an University of Technology University-Enterprise Collaboration Fund (252062213)

More Information
  • 摘要:

    带隙基准电路在总剂量辐射环境下会出现双极晶体管基极电流泄漏,电流增益下降,从而造成带隙基准输出电压偏移,使得带隙基准的可靠性下降。针对传统带隙基准基于工艺、版图和器件的总剂量加固方法会带来的成本过高、版图面积过大、普适性不高等问题,提出一种片上总剂量实时监测与自适应补偿方法,实现电路级的总剂量加固,提高了带隙基准的抗辐射能力。基于0.18 μm BCD工艺对所提方法进行具体电路设计、后端物理实现与全面验证,结果表明:不同工艺角下,分别在总剂量辐照为100~300 krad (Si)辐射条件下,带隙基准的输出电压偏移由加固前偏移电压为3.4~18.5 mV (100~300 krad)改善为加固后最大偏移电压为1 mV (100~300 krad),为电路与系统级的带隙基准抗辐照加固设计提供了一种新方法。

     

  • 图 1  带隙基准电路

    Figure 1.  Bandgap reference circuit

    图 2  总剂量效应监测与加固电路

    Figure 2.  Total dose effect monitoring and reinforcement circuit

    图 3  加固后的带隙基准电路

    Figure 3.  Hardened bandgap reference circuit

    图 4  带隙基准版图

    Figure 4.  Bandgap layout

    图 5  总剂量加固电路版图

    Figure 5.  Total dose reinforcement circuit layout

    图 6  未辐射前带隙基准电路

    Figure 6.  Unradiated front bandgap reference circuit

    图 7  TT工艺角下,辐照后的带隙基准电压

    Figure 7.  Bandgap reference voltage after irradiation at TT process angle

    图 8  FF工艺角下,辐照后的带隙基准电压

    Figure 8.  Bandgap reference voltage after irradiation at FF process angle

    图 9  SS工艺角下,辐照后的带隙基准电压

    Figure 9.  Bandgap reference voltage after irradiation at SS process angle

    图 10  TT工艺角下,加固后的带隙基准电压

    Figure 10.  Bandgap reference voltage after reinforcement at TT process angle

    图 11  SS工艺角下,加固后的带隙基准电压

    Figure 11.  Bandgap reference voltage after reinforcement at SS process angle

    图 12  FF工艺角下,加固后的带隙基准电压

    Figure 12.  Bandgap reference voltage after reinforcement at FF process angle

    表  1  不同工艺角下加固前后对比

    Table  1.   Comparison of reinforcement before and after different process angles

    工艺角 输出电压/V 加固后的输出电压范围/V
    辐照前总剂量辐照 总剂量辐照为100 krad(Si) 总剂量辐照为200 krad(Si) 总剂量辐照为300 krad(Si)
    TT 1.2020 1.2066 1.2117 1.2168 1.201681.20245
    SS 1.2165 1.2224 1.2285 1.2349 1.215701.21650
    FF 1.1895 1.1930 1.1969 1.2008 1.189001.19030
    下载: 导出CSV

    表  2  与其他文献的对比

    Table  2.   Comparison with other literature

    方法 工艺 总剂量辐照/krad(Si) 输出电压(典型值)/V 输出电压漂移/mV 温度范围/℃
    本文 0.18 μm BCD 0~300 1.202 1.0 −55~125
    文献[4] 0.13 μm CMOS 400 0.600 2.0 −55~125
    文献[5] 0.6 μm CMOS 300 −1.270 15.2 −55~125
    文献[6] BJT 100 1.250 5.0
    文献[8] 65 nm CMOS 0.300 18.0 −10~50
    文献[9] 0.5 μm CMOS 0~300 1.250 3.0 −50~125
    下载: 导出CSV
  • [1] LI T H, YANG Y T, LIU J, et al. Forward body bias for characterizing TID effect in CMOS integrated circuits[C]//Proceedings of the IEEE 24th International Symposium on the Physical and Failure Analysis of Integrated Circuits. Piscataway: IEEE Press, 2017: 1-5.
    [2] KUMAR M, UBHI J S, BASRA S, et al. Total ionizing dose hardness analysis of transistors in bias for characterizing TID effect in CMOS integrated circuits[J]. Microelectronics Journal, 2021, 115: 105182. doi: 10.1016/j.mejo.2021.105182
    [3] 刘凡. 宇航用抗辐射关键模拟单元电路的研究与应用[D]. 成都: 电子科技大学, 2017.

    LIU F. Research and application of anti-radiation key analog unit circuit for aerospace[D]. Chengdu: University of Electronic Science and Technology of China, 2017(in Chinese).
    [4] CHEN Z J, DING D, SHAN Y, et al. Investigation of TID effects on subthreshold bandgap reference circuits fabricated in a SOI process[C]//Proceedings of the International Conference on Radiation Effects of Electronic Devices. Piscataway: IEEE Press, 2018: 1-3.
    [5] LIU F, YANG F, WANG H, et al. Radiation-hardened CMOS negative voltage reference for aerospace application[J]. IEEE Transactions on Nuclear Science, 2017, 64(9): 2505-2510. doi: 10.1109/TNS.2017.2733738
    [6] 梁盛铭, 向飞, 王菡, 等. 一种抗辐射加固带隙基准的设计方法[J]. 现代应用物理, 2023, 14(1): 154-158.

    LIANG S M, XIANG F, WANG H, et al. A design method of band gap reference for anti-radiation reinforcement[J]. Modern Applied Physics, 2023, 14(1): 154-158(in Chinese).
    [7] MCCUE B M, BLALOCK B J, BRITTON C L, et al. A wide temperature, radiation tolerant, CMOS-compatible precision voltage reference for extreme radiation environment instrumentation systems[J]. IEEE Transactions on Nuclear Science, 2013, 60(3): 2272-2279. doi: 10.1109/TNS.2013.2257850
    [8] VERGINE T, MICHELIS S, DE MATTEIS M, et al. A 65nm CMOS technology radiation-hard bandgap reference circuit[C]//Proceedings of the 10th Conference on Ph. D. Research in Microelectronics and Electronics. Piscataway: IEEE Press, 2014: 1-4.
    [9] 刘智, 杨力宏, 姚和平, 等. 抗辐射加固CMOS基准设计[J]. 太赫兹科学与电子信息学报, 2017, 15(1): 125.

    LIU Z, YANG L H, YAO H P, et al. Design of a total-dose radiation hardened CMOS reference[J]. Journal of Terahertz Science and Electronic Information Technology, 2017, 15(1): 125(in Chinese).
    [10] WU Y C, LUO P, ZHANG B. Neutron and total ionizing dose irradiation hardened LDO[C]//Proceedings of the IEEE 16th International Conference on Solid-State & Integrated Circuit Technology. Piscataway: IEEE Press, 2022: 1-3.
    [11] SHETLER K J, HOLMAN W T, KAUPPILA J S, et al. Total dose measurement circuit design based on a voltage reference topology[J]. IEEE Transactions on Nuclear Science, 2016, 64(1): 559-566.
    [12] GROMOV V, ANNEMA A J, KLUIT R, et al. A radiation hard bandgap reference circuit in a standard 0.13 μm CMOS technology[J]. IEEE Transactions on Nuclear Science, 2007, 54(6): 2727-2733. doi: 10.1109/TNS.2007.910170
    [13] PRIVAT A, DAVIS P W, BARNABY H J, et al. Total dose effects on negative and positive low-dropout linear regulators[J]. IEEE Transactions on Nuclear Science, 2020, 67(7): 1332-1338. doi: 10.1109/TNS.2020.2977296
    [14] 王鹏. 基于标准CMOS工艺的抗辐射带隙基准电路设计[J]. 微处理机, 2016, 37(3): 13-16.

    WANG P. Design radiation hardened bandgap reference circuit based on standard CMOS technology[J]. Microprocessors, 2016, 37(3): 13-16(in Chinese).
    [15] FERRARO R, ALÍA R G, DANZECA S, et al. Analysis of bipolar integrated circuit degradation mechanisms against combined TID–DD effects[J]. IEEE Transactions on Nuclear Science, 2021, 68(8): 1585-1593. doi: 10.1109/TNS.2021.3082646
    [16] 李顺, 宋宇, 周航, 等. 双极型晶体管总剂量效应的统计特性[J]. 物理学报, 2021, 70(13): 363-368.

    LI S, SONG Y, ZHOU H, et al. Statistical characteristics of total ionizing dose effects of bipolar transistors[J]. Acta Physica Sinica, 2021, 70(13): 363-368(in Chinese).
    [17] ADAMS D A, BARNES H A, GOLDSTEIN N P, et al. A total ionizing dose dataset for vertical NPN transistors[C]//Proceedings of the IEEE Radiation Effects Data Workshop. Piscataway: IEEE Press, 2014: 1-3.
    [18] PRIVAT A, BARNABY H J, TOLLESON B S, et al. Temperature response on NPN and PNP bipolar junction transistors after total ionizing dose irradiation exposure[C]//Proceedings of the 19th European Conference on Radiation and Its Effects on Components and Systems. Piscataway: IEEE Press, 2019: 1-6.
    [19] ZEBREV G I, PETROV A S , USEINOV R G , et al. Simulation of bipolar transistor degradation at various dose rates and electrical modes for high dose conditions[J]. IEEE Transactions on Nuclear Science, 2009, 61(4): 2505-2510.
    [20] ZHANG T, LIU Y, EN Y F, et al. Experiment and numerical simulation of total dose effects in the substrate PNP transistors[C]//Proceedings of the International Conference on Quality, Reliability, Risk, Maintenance, and Safety Engineering. Piscataway: IEEE Press, 2013: 1030-1032.
  • 加载中
图(12) / 表(2)
计量
  • 文章访问数:  232
  • HTML全文浏览量:  138
  • PDF下载量:  7
  • 被引次数: 0
出版历程
  • 收稿日期:  2023-10-27
  • 录用日期:  2023-12-07
  • 网络出版日期:  2023-12-19
  • 整期出版日期:  2025-12-31

目录

    /

    返回文章
    返回
    常见问答