Design of low voltage CMOS folded-cascode mixer
-
摘要: 基于SMIC 0.18μmCMOS工艺,采用一种折叠共源共栅结构,设计实现了一种低压CMOS折叠共源共栅混频器,解决了传统Gilbert混频器中跨导级与开关级堆叠带来的高电源电压问题,以及在跨导级的高跨导、高线性与开关级的低噪声间进行折衷设计的难题.该混频器核心电路尺寸为165μm×75μm,当射频信号、本振信号和中频信号分别为1575.42MHz、1570MHz和5.42MHz时,仿真表明:该混频器转换增益( GC )为15dB,双边带噪声系数为12.5dB,输入三阶截断点为-0.4dBm,在1.2V的电源电压条件下,功耗为3.8mW,可用于航空航天领域的电子系统中.Abstract: By using the folded-cascode structure, the problem on high supply voltage of the stacking trans-conductance stage and switching-transistor stage was solved, and the trade-off among the high trans-conductance, high linearity of the trans-conductance stage and the low noise of the switching-transistor stage were also realized. Implemented in a SMIC 0.18μm CMOS process, the low-voltage complementary metal-oxide semiconductor (CMOS) folded-cascode mixer (FCM) core has an area of 165μm×75μm. When the frequency of the radio frequency (RF) signal, local oscillator (LO) signal and the intermediate frequency (IF) signal are 1575.42MHz, 1570MHz and 5.42MHz, respectively, the simulation results show that the mixer features a conversion gain ( GC ) of 15dB, a dual sideband (DSB) noise figure of 12.5dB, a third-order input intercept point (IIP3) of -0.4dBm, and consumes 3.8mW at a power supply voltage of 1.2V. The mixer can be applied to the electronic systems within the realm of the aviation aerospace.
-
Key words:
- CMOS integrated circuits /
- radio receivers /
- mixers /
- navigation /
- power supply /
- low-voltage /
- folded-cascode
-
[1] Chang F C, Huang P C, Chao S F, et al. A low power folded mixer for UWB system applications in 0.18μm CMOS technology[J]. IEEE Microwave Theory and Wireless Component Letters, 2007,17(5):367-369 [2] Arvind Kumar, Sandip Tiwari. A power-performance adaptive low voltage analog circuit design using independently controlled double gate CMOS technology //Proceedings of the 2004 International Symposium on Circuits and Systems. Vancouver: the Institute of Electrical and Electronics Engineers, Inc, 2004:197-200 [3] Huang Mingfeng, Kuo C J, Lee Shuenn-Yuh. A 5.25GHz CMOS folded-cascode even-harmonic mixer for low-voltage applications[J]. IEEE Transactions on Microwave Theory and Techniques, 2006, 54(2):660-669 [4] 吴明明. 2.4GHz CMOS混频器的设计与仿真 . 哈尔滨:哈尔滨工业大学微电子科学与技术系, 2006 Wu Mingming. 2.4GHz CMOS design and simulation of mixer . Harbin:Dept. of Microelectronics Science and Technology, Harbin Institute of Technology, 2006(in Chinese) [5] 刘乾坤.超宽带系统中CMOS直接下变频混频器的设计和研究 .西安:西安电子科技大学微电子学院, 2007 Liu Qiankun. Design and research on CMOS direct down conversion mixer for UWB system . Xi-an: School of Microelectronics, Xidian University, 2007(in Chinese) [6] Pullela R S, Sowlati T, Rozenblit D. Low flicker-noise quadrature mixer topology //Proceedings of the 2006 IEEE International Solid-State Circuits Conference Digest of Technical Papers. Maine:S3 Digital Publishing, Inc,2006:1870-1879 [7] Wu T H, Tseng S C, Meng C C, et al. GaInP/GaAs HBT sub-harmonic gilbert mixers using stacked-LO and leveled-LO topologies[J]. Microwave Theory and Techniques, 2007,55(5):880-889 [8] 崔福良.蓝牙收发机中混频器电路和镜像抑制电路的分析与设计 .上海:复旦大学微电子学系, 2004 Cui Fuliang. Analysis and design of mixers and image-reject circuits in bluetooth transceiver . Shanghai:Dept. of Microelectronics, Fudan University, 2004(in Chinese) [9] 陈邦媛.射频通信电路[M].北京:科学出版社,2004:58 Chen Bangyuan. RF communication circuits[M]. Beijing: Science Press,2004:58(in Chinese) [10] Lee C P, Behzad A, Dayo Ojo, et al. A highly linear direct-conversion transmit mixer transconductance stage with local oscillation feedthrough and I/Q imbalance cancellation scheme //Proceedings of the 2006 IEEE International Solid-State Circuits Conference Digest of Technical Papers. Maine:S3 Digital Publishing, Inc,2006:1450-1459 [11] Shevchuk E, Kyusun Choi. Folded cascode CMOS mixer design and optimization in 70 nm technology //Proceedings of 48th Midwest Symposium on Circuits and Systems. Stoughton: The Printing House, Inc, 2005:943-946 -
点击查看大图
计量
- 文章访问数: 3469
- HTML全文浏览量: 347
- PDF下载量: 1039
- 被引次数: 0
下载:
