Numerical thermal analysis for leaded surface mounted plastic package
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摘要: 建立了四边引线塑料扁平封装(PQFP, Plastic Quad Flat Package)数值热模拟的详细模型和简化模型,实验验证了这两种模型的模拟精度.对PQFP在机载恶劣环境下的稳态热性能进行了研究,分析了影响元件内、外热阻的各种因素.结果表明,内部采用多层结构设计是改善PQFP元件热性能的最佳方案,而在采用强迫空气冷却时,空气速度不应大于5m/s.对承受脉冲形式热载荷和环境温度随时间变化两种情况下的PQFP元件进行了瞬态热特性研究,获得了芯片结点温度随时间变化的曲线,可用于研究元件因过热引起的热应变、热损坏和电信号失真,为改进和优化元件热设计提供科学依据.
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关键词:
- 电子封装-表面贴装技术 /
- 热性能 /
- 数值模拟
Abstract: The numerical detailed model and compact model were created for plastic quad flat package(PQFP), and the accuracy of two models was verified by the measurement values. The steady thermal performance of PQFP was studied under harsh environment, and factors effecting on the inner and outer thermal resistances were analyzed. Results show that using the multi-layer structure is a perfect way to improve the thermal performance, and forced air velocity around the PQFP should be lower than 5m/s. The transient thermal performance of PQFP was discussed for two cases: pulse heat loads and the ambient air temperature varying with time. Thermal responses of the die were got, which could be used to study the thermal stress, disability, and signal fuzzy, and be a basis for improving package’s thermal design. -
[1] Hanreich G, Nicolics J, Musiejovsky L.High resolution thermal simulation of electronic components[J].Microelectronics and Reliability,2000, 40(12):2069-2076 [2] Admas V H, Blackburn D L, Joshi Y.Package geometry considerations in thermal compact modeling strategies Bardon J P,Beyne E,Saulnier J B. Thermal Management of Electronic Systems III. Paris:Elsevier\|Service Abonnements, 1997:122-130 [3] Aghazadeh M, Mallik D. Thermal characteristics of single and multi-layer high performance PQFP packages Proc IEEE Semicond Therm Temp Meas Symp. Piscataway:IEEE,1990:33-39 [4] Zhou Tiao, Hundt M. Board and system level effects on plastic package thermal performance[J].Proc Electron Compon Technol Conf,1996:911-917 [5] Davies M R D, Cole R, Lohan J. Factors affecting the operational thermal resistance of electronic components[J].Journal of Electronic Packaging, Transactions of the ASME,2000, 122(3):185-191 [6] JESD 51-3:low effective thermal conductivity test board for leaded surface mount packages .1999-10.http://www.jedec.com [7] JESD 51-7:high effective thermal conductivity test board for leaded surface mount packages .1999-10.http://www.jedec.com [8] JESD 51-2:integrated circuits thermal test method environment conditions-natural convection(still air) .1999-10.http://www.jedec.com [9] 余建祖.电子设备热设计及分析技术[M].北京:高等教育出版社,2002:288-292 Yu Jianzu. Thermal design and analysis techniques of electronic equipment[M].Beijing:Higher Education Press, 2002:288-292(in Chinese)
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