Finite element analysis of electromigration induced stress in through-silicon-via
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摘要: 在三维电子封装中,硅通孔(TSV,Through-Silicon-Via)是实现芯片垂直互连的关键环节,其可靠性至关重要.随着硅通孔中电流密度的增大,电致应力对TSV可靠性的影响也越来越大.基于该耦合方程和有限元的一般原理,详细地推导了弹性材料属性下TSV内部的电致应力、应变的有限元分析模型;利用ABAQUS中的用户自定义单元(user defining element)接口,实现了该模型的有限元计算,并利用解析解对该有限元模型的正确性进行了验证.利用有限元模型对TSV中铜填充的电迁移问题进行了分析计算,描述了铜填充在电迁移过程中电致应力、应变以及空位浓度的演化过程和分布规律,为三维电子封装可靠性的全面评估提供了一定的依据.Abstract: Through-silicon-via (TSV) plays a key role in chip's vertical interconnection in 3D electronic package, so its reliability shows great importance. As the current density through TSV increasing, current induced stress has larger and larger influence on the TSV's reliability. The methodology for evaluation of electromigration induced stress in TSV was developed based on the coupling equation of stress-mass diffusion and the principle of finite element method (FEM), together with the user defined element on the platform of ABAQUS. The numerical simulation of this model was set and its accuracy was verified with analytical solution. The electromigration problem was simulated with a finite element model; The evolution and distribution of electromigration induced stress, strain and vacancy concentration in copper pour hatch were described. So the reliability of 3D electronic package could be assessed someway.
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