Abstract: End-to-end flow latency analysis of complex embedded system is an effective way to assess system's real-time performance. Architecture analysis and design language (AADL) is the standard language to specify the architecture of complex embedded system, end-to-end flow of which describes the components' interaction. At present, most manual latency analysis approaches could consider flow's precise semantics. However, the efficiency of this time consuming analysis is low; although automatic methods have better efficiency, the accuracy is not satisfying because of the low coverage of delay-contribution attributes. What's more, both kinds of methods only focus on the typical interactive situations such as the worst-latency analysis. The impact of design elements resulting in uncertainty cannot be analyzed. Thus, one approach to analyzing AADL end-to-end flow latency based on timed automata model was proposed. First, latency-contributed attributes meta-model of flow was constructed to improve the coverage of latency-contributed attributes. Then the transformation from AADL end-to-end flow to timed automata model was studied. Latency analyzing was performed through simulating the timed automata model. Finally, the experiments based on one case study demonstrate that our way can precisely model the transportation semantics and the latency attributes semantics of a flow, illustrating our way's sufficient expressive competence. Additionally, the experiments also show flexible analysis ability of our approach by dealing with the various interactive scenarios and even the random time factors in the transportation of information. Meanwhile, the state transition and the changing on the time factors provide a basis and suggestions for the further improvement of the original AADL model.