VLIW上的软件旁路与细粒度并行调度

朱凯佳; 王雷; 尹宝林

VLIW上的软件旁路与细粒度并行调度

北京航空航天大学计算机学院, 北京 100083

基金项目: 北京市自然科学基金资助项目(4023012)

详细信息

作者简介:
朱凯佳(1974-),男,湖南长沙人,博士生,zhukj@tom.com.

中图分类号: TP 311
计量
- 文章访问数: 2253
- HTML全文浏览量: 181
- PDF下载量: 5
- 被引次数: 0
出版历程
- 收稿日期: 2003-06-05
- 网络出版日期: 2003-10-31

Software bypass and fine-grained parallel scheduling on VLIW

School of Computer Science and Technology, Beijing University of Aeronautics and Astronautics, Beijing 100083, China

摘要

摘要: 描述并分析了一种新型的VLIW(Very Long Instruction Word)机器模型,为充分利用该模型的并行特性,提出了基于静态单一赋值(SSA)表示的软件旁路方法,以及集成的基于操作的指令调度与寄存器分配算法.与常规的软件旁路方法和基于周期的调度方法相比,该方法可以灵活地进行结果寄存器的分配,并有效减少由重用结果寄存器导致的"危险值"溢出次数,生成高质量的目标代码.
- 指令调度 /
- 寄存器分配 /
- 超长指令字 /
- 软件旁路
Abstract: A new very long instruction word(VLIW) machine model was described and analyzed.In order to exploit the parallelism in this model, a software bypass method based on static single assignment and an integrated operation-based instruction scheduling and register allocation algorithm were presented. Compared with traditional software bypass and cycle based scheduling algorithm, the new methods can efficiently allocate result registers, schedule micro operations, reduce "hazard value" spills caused by result register reuse, thus yield high quality target code.
- instruction schedule /
- register allocation /
- very long instruction word /
- software bypass

HTML全文

参考文献(1)

[1] Postiff M A, Greene D A, Tyson G S, et al. The limits of instruction level parallelism in SPEC95 applications[J]. ACM SIGARCH Computer Architecture News, 1999, 27(1):31~34 [2] Free Soreware Fundation Inc. GCC info .http://www.gnu.org /sofeware/gcc/onlinedocs,2003-05/2003-07 [3] Hennessy J L, Patterson D A. Computer architecture:a quantitative approach, second edition[M]. San Francisco:Morgan Kaufmann Publishers, 1995 [4] Muchnick S S. Advanced compiler design and implementation [M]. San Francisco:Morgan Kaufmann Publishers, 1997 [5] Fisher J A. Trace scheduling:a technique for hlobal microcode compaction[J]. IEEE Trans on Computers, 1981, 30(7):478~490 [6] Chen Gang. Effective instruction scheduling with limited registers . Boston:The Division of Engineering and Applied Sciences, Havard University, 2001 [7] 吴承勇,连瑞琦,张兆庆,等,协作式全局指令调度与寄存器分配[J].计算机学报,2000,23(5):493~499 Wu Chengyong, Lian Ruiqi, Zhang Zhaoqing, et al. Cooperating global instruction scheduling and instant register allocataion[J]. Chinese J Computers, 2000, 23(5):493~499(in Chinese) [8] Hwu W M, Mahlke S A, Chen W Y, et al. The superblock:an effective technique for VLIW and superscalar compilation[J]. The J of Supercomputing, 1993,7(1-2):229~249 [9] Mahlke S A, Lin D C, Chen W Y, et al. Effective compiler supoort for predicated execution using the hyperblock[J]. ACM SIGMICRO Newsletter, 1992,23(1-2):45-54 [10] Steven J B. Lookahead scheduling[J]. ACM SIGMICRO Newsletter, 1992,23(1-2):256~259

施引文献

资源附件(0)

访问统计