留言板

尊敬的读者、作者、审稿人, 关于本刊的投稿、审稿、编辑和出版的任何问题, 您可以本页添加留言。我们将尽快给您答复。谢谢您的支持!

姓名
邮箱
手机号码
标题
留言内容
验证码

一种超低压超低耗NMOS衬底偏置混频器

宋 丹 张晓林

宋 丹, 张晓林. 一种超低压超低耗NMOS衬底偏置混频器[J]. 北京航空航天大学学报, 2009, 35(4): 480-484.
引用本文: 宋 丹, 张晓林. 一种超低压超低耗NMOS衬底偏置混频器[J]. 北京航空航天大学学报, 2009, 35(4): 480-484.
Song Dan, Zhang Xiaolin. Ultra-low voltage ultra-low power NMOS bulk-biased mixer[J]. Journal of Beijing University of Aeronautics and Astronautics, 2009, 35(4): 480-484. (in Chinese)
Citation: Song Dan, Zhang Xiaolin. Ultra-low voltage ultra-low power NMOS bulk-biased mixer[J]. Journal of Beijing University of Aeronautics and Astronautics, 2009, 35(4): 480-484. (in Chinese)

一种超低压超低耗NMOS衬底偏置混频器

基金项目: 国防科工委民用航天专项基金资助项目
详细信息
    作者简介:

    宋 丹(1983-),女,辽宁沈阳人,博士生,buaasd@ee.buaa.edu.cn.

  • 中图分类号: TN 47

Ultra-low voltage ultra-low power NMOS bulk-biased mixer

  • 摘要: 使用两对NMOS管和衬底偏置技术,采用SMIC 0.18μm CMOS工艺,为卫星导航双系统兼容接收机的射频集成电路芯片设计了一种超低压、超低耗NMOS衬底偏置混频器(NBBM,NMOS Bulk-Biased Mixer).以其中的GPS系统为例:射频信号、本振信号和中频信号分别为1575.42MHz,1570MHz和5.42MHz.测试表明:在1V电源电压下,驱动差分负载阻抗1000Ω时,混频器消耗电流约为1.37mA,变频增益( GC )超过2.11dB,输入1dB压缩点( P in-1dB)约为-13dBm;若加入运放驱动,变频增益可超过14dB,但会带来线性度的降低、功耗以及面积的增加.

     

  • [1] Park C, Han J, Kim H, et al. A 1.8-GHz CMOS power amplifier using a dual-primary transformer with improved efficiency in the low power region [J]. IEEE Transactions on Microwave Theory and Techniques. 2008, 56(4):782-792 [2] Shebaita A, Ismail Y. Multiple threshold voltage design scheme for CMOS tapered buffers [J]. IEEE Transactions on Circuits and Systems II: Express Briefs , 2008, 55(1):21-25 [3] Gu Q, Xu Z, Huang D. A low power V-band CMOS frequency divider with wide locking range and accurate quadrature output phases [J]. IEEE Journal of Solid-State Circuits, 2008, 43(4):991-998 [4] Chu Fangqing, Li Wei, Su Yanfeng, et al. An implementation of a CMOS Down-conversion mixer for GSM1900 receivers [J]. Chinese Journal of Semiconductors, 2006, 27(3):467-472 [5] Kathiresan G,Toumazou C. A low voltage bulk driven downconversion mixer core IEEE Proceedings of the International Symposium on Circuits and Systems. Orlando, Florida: IEEE, 1999: 598-601 [6] Kienmayer C, Tiebout M, Simburger W, et al. A low-power low-voltage NMOS bulk-mixer with 20 GHz bandwidth in 90 nm CMOS Proceedings of the 2004 International Symposium on Circuits and Systems. Vancouver BC, Canada: IEEE, 2004:385-388 [7] 陈邦媛.射频通信电路[M].北京:科学出版社,2004:72 Chen Bangyuan. RF communication circuit[M]. Beijing: Science Press, 2004:72(in Chinese) [8] Khateb A, Biolek D, Novacek K. On the design of low-voltage low-power bulk-driven CMOS current conveyors 29th International Spring Seminar on Electronics Technology. St. Marienthal, Germany:IEEE,2006: 318-321 [9] De Geronimo G, O-Connor P. MOSFET optimization in deep submicron technology for charge amplifiers [J]. IEEE Transactions on Nuclear Science, 2005,52(6): 3223-3232 [10] Marin M, Deen M J, de Murcia M, et al. Effects of body biasing on the low frequency noise of MOSFETs from a 130 nm CMOS technology Circuits IEE Proceedings Circuits, Devices & Systems. Stevenage: IET Michael Faraday House,2004, 151:95-101 [11] Kyechong Kim, Iliadis A A. Characterization of latch-up in CMOS inverters in pulsed electromagnetic interference environments 2007 International Semiconductor Device Research Symposium. 2007:1-2
  • 加载中
计量
  • 文章访问数:  4151
  • HTML全文浏览量:  226
  • PDF下载量:  960
  • 被引次数: 0
出版历程
  • 收稿日期:  2008-04-22
  • 网络出版日期:  2009-04-30

目录

    /

    返回文章
    返回
    常见问答